ausgewählte Veröffentlichungen

• Artikel

  • Functionality-Enhanced Logic Gate Design Enabled by Symmetrical Reconfigurable Silicon Nanowire Transistors.  IEEE transactions on nanotechnology, Vol.14(4), pp. 689-698.  2015

• Tagungsband

  • Effect of independently sized gates on the delay of reconfigurable silicon nanowire transistor based circuits.  EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, pp. 17-20. 2015